Semiconductor memory devices often require that two voltages be supplied to the device The first voltage is from a fixed voltage supply Vcc and the second voltage is from a variable voltage supply Vpp set to a high voltage level when programming and a low voltage when reading. A voltage level detecting circuit detects whether the variable voltage supply is at the high or low voltage level. The output voltage level of the detecting circuit sets the operation of the memory device to either programming modes or reading modes. Existing prior art voltage detecting circuits tend to suffer, however, from at least one of the following three problems: 1) the construction of the circuit is difficult; 2) it is difficult to achieve stable circuit operation; 3) a large number of components are required for the circuit. The first two problems arise when both depletion and enhancement mode transistors are used in the circuit and the ratio of the dimension of the first depletion type transistor and the first enhancement type transistors must be selected to be a predetermined value. One prior art circuit counters problems 1 and 2 by replacing a second depletion type transistor connected between the fixed voltage supply and a second enhancement type transistor with a group of enhancement type transistors which exacerbates problem 3.
An attempt is made by Higuchi et al. in U.S. Pat. No. 4,709,165 (1987) to disclose a circuit having a simplistic construction and few components. The Higuchi circuit discloses a voltage supply level detecting circuit comprising: a first voltage supply terminal receiving a fixed voltage level; a second voltage supply terminal receiving a variable voltage level being set at a high voltage level or low voltage level; a ground terminal; a first MIS transistor of one conductivity type; and a second MIS transistor of an opposite conductivity type. The first and second MIS transistors are connected in series between the second voltage supply terminal and the ground terminal. The gates of the first and second MIS transistors are both connected to the first voltage supply terminal The level of the junction between the first and second MIS transistors is used for detecting whether the high voltage level or the low voltage level is applied to the second voltage supply terminal.
While Higuchi solves many of the prexisting problems with voltage level detecting circuits, there is still a need for a voltage level detecting circuit with the advantages of Higuchi but where the current between the variable voltage supply to ground is more closely a function of Vcc than the conductance of the second MIS transistor of Higuchi which is greatly affected by Vcc. There is also a need for the current between the variable voltage supply and ground to be less process sensitive than the current in the Higuchi circuit.